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Simulation temperature and extraction temperature

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Sambhav_1

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Hi,

Can we use the layout extracted at one temperature and then use that netlist for different simulation temperatures?
Is this approach good one or can be use in some scenarios only( like simulating at 25 deg and extracted at 150 to get more extreme results at 25).

Thanks
 

Parasitic Elements are not temperature dependent to my knowledge so there shouldn't be any difference but intrinsic devices will change the response.
 

How the intrinsic device behaviour will change with the change in the extraction temperature? I think parasitcs are temperature dependent as they consists of resistance of the metal. correct me if i am wrong.
And what are the difference i can see when i extract the layout at different temperature(Acc. to me parasitics should change, what else will change?)
 

You could modify the extract rules to emulate any
temperature or process corner you'd like. Or, you
could bake tempco into the resistor and capacitor
models that the extracted netlist refers to.

But metal TC is going to be way less than MOSFET
drive strength TC, and a field MOS cap (if field is
decently doped) will have hardly any TC at all.
 

1. Parasitic resistances - resistances of metals and vias -are temperature-dependent.
Parasitic capacitances and inductances (individual elements - as opposed to an effective response to AC or transient signals, that is affected by parasitic resistances, capacitances, and inductances, and hence may depend on temperature) are not affected by temperature.

2. Active / design devcies (MOSFETs, diodes, bipolar transistors, etc.) are usually strongly temperature-dependent, and their temperature dependence is described by compact (SPICE) models in SPICE libraries (i.e. this is defined "outside" post-layout netlist).

3. There are two ways to do parasitic extraction, controlled by a single command (available in all parasitic extraction tools):

(a) do it at a specified temperature (usually called "operating temperature") - in this case, the extracted post-layout netlist can be used for simulating circuit at that temperature only.

(b) do the extraction at a "global temperature" (sometimes called "reference temperature"), typically 25C, and save temperature coefficients of parasitic resistors to the post-layout netlist (unique to each parasitic resistor, but often (not always) the same for resistors that belong to the same layer). In this case, you can specify "operating temperature" in the SPICE deck, and parasitic resistor values will be adjusted accordingly, so the simulation will be accurate for any temperature (within the temperature range of parasitic resistors characterization).
Temperature dependence of parasitic resistors is described by a second degree polynomial with coefficients called TC1, TC2, or like that.

"Global temperature" is the temperature T_0 that enters the second degree polynomial expression for temperature dependence:

R(T) = R(T_0) * ( 1 + TC1*(T-T_0) + TC2*(T-T_0)^2)

If you need to simulate a circuit (post-layout netlist) at different temperatures, you would need to run many extraction in case (a), for each operating temperature - which can be very time-consuming, and will require more disk space.
In case (b), you would need to do the extraction only once.

Option (b) is (usually) automatically activated when you add a command to save temperature coefficients to the post-layout netlist.
 
How the intrinsic device behaviour will change with the change in the extraction temperature? I think parasitcs are temperature dependent as they consists of resistance of the metal. correct me if i am wrong.
And what are the difference i can see when i extract the layout at different temperature(Acc. to me parasitics should change, what else will change?)
Because when you do an extraction using with any kind of tool, extractor creates a netlist including all kind of components.( parasitics and the others)
While Intrinsic elements are normally temperature dependent, it might not be true for parasitic elements because it depends totally on layout.
For instance large metal connections are very less temperature dependency ( in physical aspects) and also these elements must be modeled against temperature variations if exist.
Extractor tool simply computes the resistances,capacitances in regard of static calculation so variations are not included in my opinion.
So briefly, parasitic elements' sensivity is much less than intrinsic elements and it's usually negligible.
 

"So briefly, parasitic elements' sensivity is much less than intrinsic elements and it's usually negligible."

In general, this is not true.
Metal (conductors and vis) resistances vary a lot with temperature, by as much as 50% or more in the range from let's say -40C to 125C.

Some "intrinsic" (design) elements are not that much sensitive to temperature - for example, MOM and MIM capacitors.
Some other devices are very sensitive - MOSFETs, bipolars, diodes, etc.
 
"So briefly, parasitic elements' sensivity is much less than intrinsic elements and it's usually negligible."

In general, this is not true.
Metal (conductors and vis) resistances vary a lot with temperature, by as much as 50% or more in the range from let's say -40C to 125C.

Some "intrinsic" (design) elements are not that much sensitive to temperature - for example, MOM and MIM capacitors.
Some other devices are very sensitive - MOSFETs, bipolars, diodes, etc.
So, lets say if i extract the netlist at 150deg(no temperature sensitivity) and my simulation temperature is -55 then should i expect a significant difference in the results obtained(w.r.t when temperature sensitivity is on) ?
 

So, lets say if i extract the netlist at 150deg(no temperature sensitivity) and my simulation temperature is -55 then should i expect a significant difference in the results obtained(w.r.t when temperature sensitivity is on) ?

It depends.
But you can expect to see a significant difference (let's say, of the order of 50% or maybe 2x, for point to pint resistance, IR drop, etc.).

Very crudely - for aluminum and copper, the temperature coefficient (TC1) is of the order of 0.4%/degree, i.e. if you change temperature by 200 degrees, the aluminum and copper resistivity will change by about 80%, close to 2x.

Whether 2x is "significant difference" or not, you can decide yourself.

To me, it's significant, and should be taken care of, in the flow.
 
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