Simulation of a component that's not fully compiled

[Binome]

Hi,
I try to use the avs_aes component of opencores.
When trying to synthesize the top-level component not having synthesized all the sub-components it's complaining and it's perfectly correct.
When compiling with Questasim, it's not complaining when I compile only the top-level component (it just needs the library).
Can someone explain why?
Thanks.

 

[ads-ee]

Because compiling a file doesn't link the file it just parses the file and creates some sort of simulation image of the file. If you try and run the simulation with vsim then you'll get an error when it tries to link everything and can't find all the sub-components.

You might want to read the 2nd post in this thread, which has a nice breakdown of what goes on.

 

[Binome]

I've understood your explanation and read the related post. Everything is pretty clear but the simulation is launched correctly even when nothing else is compiled (no elaborating error) and the run is ok except for the "irq" and "readdata" output signals. Why?

 

[TrickyDicky]

Do the opencores blocks have a black_box attribute somewhere? using this attribute will force the simulator to ignore the component when mapping, leaving you with no logic for an RTL simulation (because you're telling the simulator there is no code for this block at this level).

The way around all this is direct instantiation rather than using components, because it becomes a compiler error if it cannot find the entity for an instantiated blocks.

 

[Binome]

No, I can see no black_box attribute.

 

[TrickyDicky]

Without seeing your source code or project, we have no idea what the problem may be

 

[ads-ee]

Are you absolutely sure you don't have some version of the sub-components already compiled?

Delete Questa's work directory (vdel -all) and perform the vlib work and vmap work work again so you start off fresh with an empty work library.

If you can still compile/elaborate/link the top level file only after doing this, then we'll probably have to see the code.

 

[Binome]

It's an opencores project so you can download it for free. And I get exactly the same after the refreshment commands.

 

[ads-ee]

Did you checkout the subversion repository for the project and use the "makefile" or are you compiling just the top level file avs_aes.vhd using VCOM yourself?

You haven't really told us how you are compiling the design in Questa. Did you add all the files in the directory to a Questa project, then it would compile all the files including the sub-components.

Maybe you should just post the transcript window when you do whatever you do after doing the "refreshment" commands.

 

[Binome]

I'm using Windows on my working computer so I use the Questa GUI.
I download the project on the web, extract it in some place, create a project somewhere else, add the original files in the project (Only the three needed files for now: the package, the top-level and the testbench. And it's references to source files, not copies.) and everything is running fine. Here's the transcript:

# Reading C:/questasim64_10.2c/tcl/vsim/pref.tcl 
# //  Questa Sim-64
# //  Version 10.2c Unknown Platform Jul 19 2013
# //
# //  Copyright 1991-2013 Mentor Graphics Corporation
# //  All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION
# //  WHICH IS THE PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS
# //  LICENSORS AND IS SUBJECT TO LICENSE TERMS.
# //
# Loading project avs_aes
vdel -all
vlib work
vmap work work
# Modifying C:/Users/rm231795/Documents/work/Attaque/Biblio/avs_aes/trunk/sim/avs_aes.mpf
# Compile of avs_aes_pkg.vhd was successful.
# Compile of avs_aes.vhd was successful.
# Compile of avs_aes_tb.vhd was successful.

Add: I need to create one library more: avs_aes_lib.

 

[ads-ee]

This can't be the entire transcript window output. Where is the simultion loading stuff and the final vsim> command prompt?

 

[Binome]

I was doubtful too but I've verified and Questa is only reporting that. I don't understand...

 

[TrickyDicky]

the pkg contains the component declarations for all of the components. So it will compile just fine - it wont simulate (and your messages report no simualtion).

 

[ads-ee]

the pkg contains the component declarations for all of the components. So it will compile just fine - it wont simulate (and your messages report no simualtion).

So is the OP launching the simulation using something like "run simulation" or just using "compile all"?

This is the problem with GUI users, they don't know what the tools are really doing when they run a simulation.

 

[Binome]

How can I know that?

I agree the GUI doesn't make us know enough, only I don't have a choice.

 

[TrickyDicky]

You do have a choice - you could run all the commands yourself (from the GUI)
Modelsim's projects are rather useless - you can run all the commands from TCL.

 

[Binome]

So what do I have to do?

 

[TrickyDicky]

Learn how to use the command line inside modelsim:

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#to create a library:
vlib my_library
 
#to compile a vhdl file into a library
vcom my_file.vhd -work my_library
 
#to map a library to code already compiled elsewhere
vmap my_library <my_library path>
 
#to run a simulation
vsim my_testbench
 
#to run a simulation
run X ns
 
#or
run -all
 
#to restart
restart -f
 
#to run a script file
do my_script.do

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These commands will get you through 99% of simulation in modelsim.

 

[Binome]

I've done things like that. Now my testbench avs_aes_tb is compiled (in the good "work" library in the end) and runs fine. What messages do you want me to post?

 

[dpaul]

They want you to post the entire compilation log (i.e. the results generated by each of the commands posted in #18) if you are not confident that the compilation was successful.
The message will *start like* what you have posted in #10 but should contain a lot of other information.

For you reference:
http://www.pldworld.com/_hdl/2/_ref/se_html/tutorial_html/t_batch.html