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Simulation doubt with Zener diode & MOSFET

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I have the below circuit in which I am trying to perform simulations.

Simulation Tool used - Falstad Simulator - Falstad

12V Zener Diode - Datasheet

Top MOSFET - Datasheet

Bottom MOSFET - Datasheet

Question 1 :

enter image description here

The Zener diode is 12V Rated.

I want to simulate a current of 12A through both the MOSFETs

So, for my 16V input voltage, I calculated my Resistance to be 1.33Ohms to get a current of 12A. But when both the MOSFETs are ON, my drain current through them is only 91mA. Can someone tell me what is the problem and why am I not getting a drain current of 12A? And I tried to change the Rds(on) MOSFET parameter in the tool, but not able to find and change it.

Next Question :

enter image description here

When I apply a negative voltage of -14V to the gate of the bottom MOSFET as shown below, I get a voltage at the Zener cathode as 2.195 and a voltage between the MOSFET nodes as 2.7V with 6.4mA of current?

Can someone tell me how this 2.195V and 2.7V is appearing? Just want to understand the circuit behaviour in these conditions. Please help.
 

Apparently the transistor models used in your simulation have quite different parameters than specified in the linked datasheets. Which MOSFET parameters did you set?
 

Apparently the transistor models used in your simulation have quite different parameters than specified in the linked datasheets. Which MOSFET parameters did you set?
I just took a standard N-MOSFET part in the simulator tool by just clicking the "N" key. But in any case, could you please explain me how the circuit should behave and what voltages should appear at the nodes (Zener Cathode & Zener Anode) in normal working conditions?
 

What is normal working condition? The simulation results are correct for the used small signal MOSFET models. Review Falstad explanation of MOSFET parameter, for a power transistor you'll use a beta value several magnitudes larger than default 20m, e.g. 10 to 80.

It may be easier to use a full featured circuit simulator like LTspice, that has various built-in power MOSFET models.
 

What is normal working condition? The simulation results are correct for the used small signal MOSFET models. Review Falstad explanation of MOSFET parameter, for a power transistor you'll use a beta value several magnitudes larger than default 20m, e.g. 10 to 80.

It may be easier to use a full featured circuit simulator like LTspice, that has various built-in power MOSFET models.
What I mean by Normal working condition - Both the MOSFETs are turned ON.

And another condition is when the Bottom MOSFET has a negative voltage of -16V applied to the gate. (TOP MOSFET is turned ON)

I want to understand what is the voltage values that will appear at the Zener cathode and Zener anode during both the above conditions. Can you please explain me the working on the circuit when the Bottom MOSFET has a negative voltage of -16V applied to its gate? What will happen to the voltages at the Zener cathode and Zener anode when the Top MOSFET is turned ON?
 

To see " normal" conditions with the chosen small signal transistor models, change the 1.3 ohms resistor to several 100 ohms up to 1 kohm
 

I have the below circuit in which I am trying to perform simulations.

Simulation Tool used - Falstad Simulator - Falstad

12V Zener Diode - Datasheet

Top MOSFET - Datasheet

Bottom MOSFET - Datasheet

Question 1 :

enter image description here

The Zener diode is 12V Rated.

I want to simulate a current of 12A through both the MOSFETs

So, for my 16V input voltage, I calculated my Resistance to be 1.33Ohms to get a current of 12A. But when both the MOSFETs are ON, my drain current through them is only 91mA. Can someone tell me what is the problem and why am I not getting a drain current of 12A? And I tried to change the Rds(on) MOSFET parameter in the tool, but not able to find and change it.

Next Question :

enter image description here

When I apply a negative voltage of -14V to the gate of the bottom MOSFET as shown below, I get a voltage at the Zener cathode as 2.195 and a voltage between the MOSFET nodes as 2.7V with 6.4mA of current?

Can someone tell me how this 2.195V and 2.7V is appearing? Just want to understand the circuit behaviour in these conditions. Please help.
Sir
I think from this circuit instead of zener diode you would have used voltage regulators with heat sink example 7812 add heat sink
 

Hi,

It looks to me like the top transistor doesn't turn on enough, so the junction of both has a low voltage and current. Or top not very on and bottom fully on.

Try the +16V on the gate of the top NMOS, possibly both need >10V to fully turn on. Might need e.g. 100 Ohm resistors on the gates rather than 1k and 10k. And top NMOS may need bootstrapping.

Why a negative voltage on the lower NMOS gate? It's presumably an enhancement mode device in the simulator.

Agree that simulators with models of devices with datasheets make learning and making easier. You can put voltmeters and ammeters everywhere in some simulation tools, run transients, and interpret the results at your ease.
 

Falstad's simulator is the chief one I use. There seem to be circuits where the mosfet model behaves in an unexpected manner. I apply sufficient bias voltage to turn it on but it conducts just a small amount. Not all the time, but half the time.

The edit window has just one parameter (namely threshold voltage).

As a result I tend to use bjt's rather than mosfets in my simulations.

Notice in my simple circuit below, I need to raise bias voltage to 36V, so that the upper Nmos conducts 2A.

totem 2 Nmos upper needs high bias V.png
 

Ca
Hi,

It looks to me like the top transistor doesn't turn on enough, so the junction of both has a low voltage and current. Or top not very on and bottom fully on.

Try the +16V on the gate of the top NMOS, possibly both need >10V to fully turn on. Might need e.g. 100 Ohm resistors on the gates rather than 1k and 10k. And top NMOS may need bootstrapping.

Why a negative voltage on the lower NMOS gate? It's presumably an enhancement mode device in the simulator.

Agree that simulators with models of devices with datasheets make learning and making easier. You can put voltmeters and ammeters everywhere in some simulation tools, run transients, and interpret the results at your ease.
Can you tell me how am I getting the 2.7V at the drain of the bottom MOSFET?
 

Hi,

For a raw estimation:
See the drain-source as resistance.
Then two resistors are in series, forming a voltage divider.
The resistance value depends on V_GS. So different V_GS (for each FET) result in different resistance values.
This results in unequal voltage across the FETs (drain-source)

In detail the upper resistor (1.3) and the load current through the resistor (82k) will have influence on the resulting voltage.

(Schematics without clear part names makes it difficult to discuss)

Klaus
 
Last edited:

T
Hi,

For a raw estimation:
See the drain-source as resistance.
Then two resistors are in series, firming a voltage divider.
The resistance value depends on V_GS. So different V_GS (for each FET) result in different resistance values.
This results in unequal voltage across the FETs (drain-source)

In detail the upper resistor (1.3) and the load current through the resistor (82k) will have influence on the resulting voltage.

(Schematics without clear part names makes it difficult to discuss)

Klaus
Thank you for the answer. I just want to understand, when I apply a negative voltage of -14V at the Gate of the bottom MOSFET through the 10k series resistor, how is the voltage at the zener (12V Zener diode) cathode and zener anode and MOSFET gate is determined? Could you please explain that analysis.
 

Reviewing the previous posts, I'm a bit disappointed that nobody thinks about MOSFET parameters. The top MOSFET won't fully turn even with 16V gate voltage because it's a small signal MOSFET with rather low saturation current.

Can you tell me how am I getting the 2.7V at the drain of the bottom MOSFET?
when I apply a negative voltage of -14V at the Gate of the bottom MOSFET through the 10k series resistor, how is the voltage at the zener (12V Zener diode) cathode and zener anode and MOSFET gate is determined?

Two aspects of the same problem. Z-diode is in forward bias, 0.6V voltage drop. 5V at upper MOSFET gate - 0.6V is equally shared between both transistors, Vgs of 2.2V gives the observed 6 mA Id. That's it.
 

Reviewing the previous posts, I'm a bit disappointed that nobody thinks about MOSFET parameters. The top MOSFET won't fully turn even with 16V gate voltage because it's a small signal MOSFET with rather low saturation current.




Two aspects of the same problem. Z-diode is in forward bias, 0.6V voltage drop. 5V at upper MOSFET gate - 0.6V is equally shared between both transistors, Vgs of 2.2V gives the observed 6 mA Id. That's it.
Thank you for the answer. Could you tell me how did deduced that the MOSFET is a small signal MOSFET with a low saturation current? Please tell me how you arrived at this decision? (Just want to learn and understand how you figured it out)

And, could you please provide me an equation or explanation with KVL with respect to the 2.2V?

Thank you
 

Hi,

I'm a bit disappointed that nobody thinks about MOSFET parameters.
The OP already asked how to adjust R_ds_on parameter in Falstad (post#1). So I thought he is aware of that the simulation parameter does not match datasheet specification. (Now after post#14 I'm not sure about this)
I'm not familiar with Falstad...

*********
Low saturation current:
Low saturation current means high R_ds_on. (Ohm's law).
91mA, 431mV means 4.7 Ohms of R_ds_on in the bottom Mosfet. From the datasheet it should be less than 2.5mOhms.
(I thought this is what you complain about in post#1l.

Even worse: Upper Mosfet simulation shows R_ds_on of about 15.45V / 91mA = 170 Ohms (@V_gs of about 4.5V) where the datasheet tells about 7mOhms.

FvM mentiones a "small signal Mosfet" because 170 Ohms of R_ds_on lets assume this.
170 Ohms can't be a power Mosfet.

****
In the end ... if you can't adjust Falstad for useful R_ds_on it simply can't simulate your circuit.
Maybe try LTspice...

Klaus
 
Last edited:
Could you tell me how did deduced that the MOSFET is a small signal MOSFET with a low saturation current? Please tell me how you arrived at this decision? (Just want to learn and understand how you figured it out)
See post #4 above and learn about MOSFET parameters in Falstad.

1594284831801.png


In the end ... if you can't adjust Falstad for useful R_ds_on it simply can't simulate your circuit.
Maybe try LTspice...
Although limited to a very simple MOSFET model, it can.
 

Hi,

Let me try and analyze the circuit with -14V connected to its low-side MOSFET gate. Analyses of the other circuit can be deduced from this one.

This analysis is made with an assumption that the MOSFET models used in the simulator is made to replicate the characteristics of the ones you presented datasheets. If not, if the gate-voltage thresholds are close to those on the datasheet, the analysis could still be valid.

The Low-side MOSFET is OFF with the -14V connected like that. Although the forward biased zener is supplying charges to its gate, the voltage at that gate, with reference to its gate threshold voltage, is just starting to turn the MOSFET ON. The voltage at the gate, which is the same as the zener diode cathode voltage is 2.195V. the voltage at the drain, which is the same as the zener diode anode voltage is 2.7V. That means that the diode forward voltage is 2.7V-2.195V=0.505V.

The gate threshold of the high-side MOSFET is 2V. Since we are having 2.7V at its source and approx 5V at its gate, then it's Vgs is 5V-2.7V=2.3V, barely 0.3V above the threshold, and barely turns the MOSFET ON, leaving it in the triode region. In the triode region, Rds is high. So since we have approx 16V at its drain, the Vds is 16V-2.7V=13.3V.

The 6.4mA current that you have is a combination of the currents conducted through the high-side MOSFET biasing circuit and its drain current. For the gate bias circuit, the current is (5V-2.7V)/101kohm = 22.77uA. Its drain current is then 6.4mA-22.77uA = 6.377mA. This means that this biasing arrangement leaves the high-side MOSFET with an Rds of the 13.3V/6.377mA = 2085ohm.

The current flowing through the Low-side MOSFET gate resistor is (2.195V-(-14V))/10kohm = 1.62mA. This means that the current flowing through its drain is 6.4mA-1.62mA = 4.78mA. Thus, t
Rds of the Low-side MOSFET due to this bias is 2.7V/4.78mA = 565ohm

This is just my basic analysis and is subject to confirmation.
--- Updated ---

L
 
Last edited:
Hi,

Let me try and analyze the circuit with -14V connected to its low-side MOSFET gate. Analyses of the other circuit can be deduced from this one.

This analysis is made with an assumption that the MOSFET models used in the simulator is made to replicate the characteristics of the ones you presented datasheets. If not, if the gate-voltage thresholds are close to those on the datasheet, the analysis could still be valid.

The Low-side MOSFET is OFF with the -14V connected like that. Although the forward biased zener is supplying charges to its gate, the voltage at that gate, with reference to its gate threshold voltage, is just starting to turn the MOSFET ON. The voltage at the gate, which is the same as the zener diode cathode voltage is 2.195V. the voltage at the drain, which is the same as the zener diode anode voltage is 2.7V. That means that the diode forward voltage is 2.7V-2.195V=0.505V.

The gate threshold of the high-side MOSFET is 2V. Since we are having 2.7V at its source and approx 5V at its gate, then it's Vgs is 5V-2.7V=2.3V, barely 0.3V above the threshold, and barely turns the MOSFET ON, leaving it in the triode region. In the triode region, Rds is high. So since we have approx 16V at its drain, the Vds is 16V-2.7V=13.3V.

The 6.4mA current that you have is a combination of the currents conducted through the high-side MOSFET biasing circuit and its drain current. For the gate bias circuit, the current is (5V-2.7V)/101kohm = 22.77uA. Its drain current is then 6.4mA-22.77uA = 6.377mA. This means that this biasing arrangement leaves the high-side MOSFET with an Rds of the 13.3V/6.377mA = 2085ohm.

The current flowing through the Low-side MOSFET gate resistor is (2.195V-(-14V))/10kohm = 1.62mA. This means that the current flowing through its drain is 6.4mA-1.62mA = 4.78mA. Thus, t
Rds of the Low-side MOSFET due to this bias is 2.7V/4.78mA = 565ohm

This is just my basic analysis and is subject to confirmation.
--- Updated ---

L
Thank you for the answer.

I just have 2 doubts with your answer.

1. In the simulation with the negative -14V at the gate of the Low side MOSFET, how is the voltage 2.7V arrived at the Source of the High Side MOSFET (or the drain of the Low Side MOSFET)? Could you please provide a KVL with the circuit if possible? (It would really help me in the understanding of the concept)

2. The 1.62mA you have calculated, does this current flow into the gate of the Low side MOSFET or does it flow to the -14V? Just want to understand how the current splits from the Zener cathode to the -14V and the gate of the Low side MOSFET.

Please help to clarify.

Thank you
 

Hi,

I don't know where 6.4mA is coming from.

But if I was you ... and already have the simulation... why not play around and look where which current goes?
It should be easy to place a current measurement at the low side Mosfet drain, gate, source ... to see what happens.
And many other places ... and use voltage measurement, too.

Klaus
 

Hi,

Thank you for the answer.

I just have 2 doubts with your answer.

1. In the simulation with the negative -14V at the gate of the Low side MOSFET, how is the voltage 2.7V arrived at the Source of the High Side MOSFET (or the drain of the Low Side MOSFET)? Could you please provide a KVL with the circuit if possible? (It would really help me in the understanding of the concept)
I will try and do that later.

2. The 1.62mA you have calculated, does this current flow into the gate of the Low side MOSFET or does it flow to the -14V? Just want to understand how the current splits from the Zener cathode to the -14V and the gate of the Low side MOSFET.
...
One important point to note here is that all voltages in the circuit are DC. Please bear this in mind as we proceed.

Now let's assume that you just supply power to the circuit at time t=0 and that all capacitors in the circuit (I'm referring to gate capacitances here) are discharged. From time t=0 to some other point in time (call it t_steady), there will be some transient in the MOSFET gate capacitor voltages and the 1nF capacitors externally connected to the MOSFET gates as charges flow into them and charges them into their respective steady-state voltages. Please ignore other MOSFET capacitances for now. These capacitors will be charged to a certain level depending on the voltage driving the charges. Then no further charges will be driven into the gates. This time is t_steady and from this time onwards we are in steadystate. Charges cannot leave the gates because no one condition for the charges to leave (i.e. either actively extracting the charges like MOSFET drivers do, or providing a path to a lower potential as in the case of pulling down the gate) has been provided. Since the driving voltages are still present, and there is potential difference in the circuit, then current keeps flowing along paths (or branches) that have potential difference.

In this circuit, at time t_steady, the Low-side MOSFET is already charged to 2.195V. Note that If charges should leave the gate, then this voltage will decrease. The fact that the voltage remains constants ascertains that no charge leaves and not no extra charge comes in. The entire 1.62mA steady-state current that I calculated flows from the drain through the zener, through the gate drive resistor, to the -14V.
 
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