simulating planar interdigital capacitors using HFSS!!

[abhi_kolkata]

site:www.edaboard.com hfss capacitor

hi,

i was trying to simulate planar interdigital capacitors using ansoft HFSS.but as i'm relatively new to hfss , i am not being able to build and simulate(accurately) the interdigital capacitor (idc) structure.does anybody have any experience with them and could plz share some tutorial or hfss files or project files(with some detail specifications) so that i can atleast be able to simulate the idc with some accuracy.

i need some help really urgently!!!so, eagerly waiting for replies.

with regards

abhi

 

[abhi_kolkata]

interdigtal capacitors

hi,

somebody plz help me out with this problem. i really need to know it, urgently for my project work.any advice will be appreciated.

with regards
abhi

 

[fredy]

interdigital capacitors

hi

in general in hfss for design capacitances we have problem, but usually we can simulate capacitace with one boundary condition plane.
you must first in where you want to have capacitance draw a squre plane, then select this plane and assigne LUMPED RLC Boundary to it. you can simulate your real capacitance with R and C (you can get ESR from the catalog that each factory have it)

I have very good answer in measurement and theory for combline filter with this design

best regards

 

[abhi_kolkata]

hi fredy,

can u plz send me some tutorial or some of ur files(if it is possible) on capacitor(idc) simulation in hfss, so the thing becomes clear to me.

with regards
abhi