shaiko
Advanced Member level 5
Hello people,
I designed an FPGA UART block that respondes to various user inputs via a console connection.
For example:
If the user types "day of week" the FPGA respondes "sunday"...
In order to verify the design I simulate the commands by bit inputs to the Rx channel...if every ASCII char is 8 bits so a 10 character message will involes sending 80 bits.
I do it using the testbench "after" keyword - for example:
'1' after 2us, '0' after 7us, '1' after 8us...etc
This is very time consuming for long words. Is there a simpler way to do it?
I designed an FPGA UART block that respondes to various user inputs via a console connection.
For example:
If the user types "day of week" the FPGA respondes "sunday"...
In order to verify the design I simulate the commands by bit inputs to the Rx channel...if every ASCII char is 8 bits so a 10 character message will involes sending 80 bits.
I do it using the testbench "after" keyword - for example:
'1' after 2us, '0' after 7us, '1' after 8us...etc
This is very time consuming for long words. Is there a simpler way to do it?