ee484
Full Member level 3
What is the difference between ports and pins in the Cadence?
If I create pins in the schmatic (and symbol) and run LVS check, in LVS report says PORTS are matched..or so. Which is referring is pins that I created.
I understood the ports as the pins I see on the top level schematic. If I invoke the symbol in the top-level, those pins becomes ports. Is there any other meaning for those ports?
NOTE:
I am not referring to the port instance in a schematic. Those are typically for matching in RF circuits... or input source that has input impedance consideration.
Thank you...
If I create pins in the schmatic (and symbol) and run LVS check, in LVS report says PORTS are matched..or so. Which is referring is pins that I created.
I understood the ports as the pins I see on the top level schematic. If I invoke the symbol in the top-level, those pins becomes ports. Is there any other meaning for those ports?
NOTE:
I am not referring to the port instance in a schematic. Those are typically for matching in RF circuits... or input source that has input impedance consideration.
Thank you...