While a PCI bridge chip is certainly the best solution to inteface an embedded micro board to PC using PCI bus, I must disagree a little from last definition given above on how 8051 manages memory.
Although is true that 8051 cores may handle code and data storage in two separated memory space (using PSEN as an additional address bit), this is not the only memory mode. Another one, known as von Neumann mode, can be used. In such of mode the data and code spaces share the same memory space, though in such way only 64k of data/code may be used for 8051. Von Neaumann mode may be entered simply ANDing PSEN with $RD.
Apart from the obvious architecture differences, 8051 (in von Neumann mode) and Pentium will manage ram memory in a similar fashon.
To store code in ram (your application) with built-in data, both makes use of a loader (called bootstrap loader, or bios in PCs) which resides usually on Flash (or Eprom) and launched at power-on or reset or whatever condition which is capable to start up the loader. Once the loader has started it comes to wait for your application using any sort of media or device or interface. It is the loader which is managing it. So, you can use hardisk, PCI bus, or RS232 to load your application in ram memory.
Once your application is in ram it makes not difference from processor if code or data may be fetched in ram rather then rom. 8051 in von Newmann mode will still use MOVC during an instruction fetch and MOVX when a data handle is required from the same external ram memory space. The described mode is usually used in In System Debugger boards.
Above is just for completeness.