Thanks all.
The separate SGND and PGND are recommended in the LTC4020 datasheet (it has pins for both and they are net-tied near the chip). The SS pin is in reference to SGND.
I'll remove the capacitor and take new measurements with a scope and look into different components.
I just wanted to make sure the generic circuit is correct before diving into it very far. In terms of voltage followers, I've only found examples where the Vin voltage connects to the non-inverting (+) input and it is a current sourcing circuit. The datasheet also doesn't specify using a n-mos or p-mos FET but n-mos seemed logical. Thanks.
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I have replaced the FET and op-amp with new parts and removed the capacitor and it now works as intended. I can set the SS pin from 0-1V now so I think it was the capacitor causing stability issues.
BTW, Klaus, the FET I'm using is DMN2005
K which has ID max of 300mA. Sorry, I should have corrected earlier.
https://www.diodes.com/assets/Datasheets/ds30734.pdf
Is there a better choice small signal FET in the same package (SOT-23)?