Re: OPamp design!!
Hi, saad ,
to be honest, I think this structure is not so good .
There are three simple current mirrors. Vds mismatch leads to DC offset, and current mirror introduce mirror poles and zeros which affect the frequency response of the OPAMP.
I admit that the biasing cascode output stage scheme in my report is not feasible, you have to set up a practical biasing network .
By the way, at that time I was taught by professor Redman. White, he is a very nice professor. If possible ,you can choose his class--- Analog and Mixed Signal CMOS design . you may get more help .