Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Signal integrity for ADC (LC filter question)

Status
Not open for further replies.

rawbus

Member level 1
Joined
Jun 18, 2010
Messages
33
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,641
I have an ADC that samples 12-bits at 65 MHz that I'm feeding into an FPGA. At the moment, I'm just trying to evaluate the ADC. It has a typical SNR of 71.6 dBFs, a SINAD of 71.5 dBFs, THD of 93dbc. When I put a low frequency sinusoidal signal from a HP 33120A signal generator at around 100kHz I get noise that makes it hard to find the min/max. The signal generator has a harmonic distortion of -45 dBc. There is a lot of toggling back and forth and the max value that the ADC reads in a given cycle doesn't correlate to where the max/min should be, or I get multiple max/min that can be up to 8 cycles apart.

If I put an LC low pass filter on the cable input, lets say DC to 2 MHZ, would that be the solution to my problem of getting rid of the noise or is that the wrong approach?
 

The LC filter will attenuate the noise above 2MHz and help with the signal generator's harmonic distortion. a band-pass filter might be better in your case.
If you want to improve the overall noise performance you need a better signal source.
 

    rawbus

    Points: 2
    Helpful Answer Positive Rating
The generator also has a spurious non-harmonic specification of < -65 dBc. It's sounds unlikely that it causes the said strong noise. Did you perform a quantitative measurement of the noise spectrum by FFT?. I doubt that you managed to include a severe noise or interference source with your design. Low pass filtering of the ADC input (either RC or LC) can be suitable though to remove out of band amplifier noise, considering the large ADC signal bandwidth of 500 or more MHz.

P.S.: To check, if the noise is originated from the signal generator, change it's output attenuation or repplace it by a 50 ohm termination.
 

No I haven't done any FFT yet I'm pretty new to this. Basically, I'm just trying to evaluate the accuracy of the ADC using a sine wave and find out what its limitations are. The ADC is a TI ADS62P22.

The important question I guess I have is, is this a signal integrity problem or is the range output of the ADC going to be between 0-15 clock cycles from the actual result on outputting the actual peak values. Basically, is it normal for an ADC to give multiple max/min measurements that can span up to 8 clock cycles away. For example, I have a 0 crossing at 155 cycle and another zero crossing at 480 cylce. If the ADC gives me max values at 300, 302, 310, 320, and 324 cycles where the midpoint is 317-318, is that normal ADC operation?
 

I reviewed the 33120 noise spec, and it would allow for excessive high frequency noise (by saying + 6dB/octave above 1 MHz without any bound). So I think it's better to have a low pass. Even a first order RC (parallel capacitor) should show an considerable effect, if the generator is the dominant noise source.
 

    rawbus

    Points: 2
    Helpful Answer Positive Rating
Looking at the signal 100KHz from the generator into the oscilloscope I can see a variance of 30mV over 30 ns where the signal is spiking.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top