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Shifting an array of bytes

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yttuncel

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Hello,

I have decided to open a new thread, since this is totally a different problem than the one stated here:

I'm having problems with shifting an array of bytes, I already did some search and found this topic very similar to mine. Yet the method provided there did not solve my problem, so I am opening a new thread.

First I'm giving my shifter module:

Code VHDL - [expand]
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ibrary IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use work.mypackage2.all; -- contains the type reg array
 
entity shifter is
    generic ( REGSIZE  : integer := 8);
    port(clk      : in  std_logic;
            Scan_Dav : in  std_logic;
            Data_in  : in  std_logic_vector(7 downto 0);
            Data_out : out reg_array );
end shifter;
 
architecture bhv of shifter is
       
    signal shift_reg : reg_array;
begin
    process (clk, Scan_Dav) begin
        if rising_edge(clk) then
                if Scan_Dav = '1' then
                    shift_reg(REGSIZE-1 downto 1) <= shift_reg(REGSIZE-2 downto 0);
                    shift_reg(REGSIZE-1) <= shift_reg(0);
                else
                    shift_reg <= shift_reg;
                end if;
          end if;
     Data_out <= shift_reg;
    end process;
end bhv;



and my package does have the type declaration that @BlackHelicopter suggested on the previous topic.

Code VHDL - [expand]
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--  Package File Template
--
--  Purpose: This package defines supplemental types, subtypes, 
--       constants, and functions 
 
 
library IEEE;
use IEEE.STD_LOGIC_1164.all;
 
package mypackage2 is
 
   subtype reg is std_logic_vector(7 downto 0); -- a byte
    type reg_array is array (7 downto 0) of reg; -- array of bytes
 
end mypackage2;
 
 
package body mypackage2 is
 
end mypackage2;



and this is the RTL schematic of my shifter: shifter.JPG

I really don't know what is the problem, I appreciate any help.

Also, at first, my array width was 16, but compiler warned me that my FPGA does nat have enough I/O pins, that will be my second question how to solve that issue as well.

ADDITION:

I forgot to add the warnings, since the code is compiled and schematic is generated I receive no errors, but lots of warnings.

Code:
WARNING:Xst:819 - "I:/Proje/IndividualTest/shifter2/shifter.vhd" line 19: One or more signals are missing in the process sensitivity list. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are:
   <shift_reg>
WARNING:Xst:647 - Input <Data_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:653 - Signal <shift_reg<0>> is used but never assigned. This sourceless signal will be automatically connected to value 00000000.
WARNING:Xst:1710 - FF/Latch <shift_reg_1_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2404 -  FFs/Latches <shift_reg_1<7:0>> (without init value) have a constant value of 0 in block <shifter>.
WARNING:Xst:2404 -  FFs/Latches <shift_reg_2<7:0>> (without init value) have a constant value of 0 in block <shifter>.
WARNING:Xst:2404 -  FFs/Latches <shift_reg_3<7:0>> (without init value) have a constant value of 0 in block <shifter>.
WARNING:Xst:1710 - FF/Latch <shift_reg_4_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.WARNING:Xst:819 - "I:/Proje/IndividualTest/shifter2/shifter.vhd" line 19: One or more signals are missing in the process sensitivity list. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are:
   <shift_reg>
WARNING:Xst:647 - Input <Data_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:653 - Signal <shift_reg<0>> is used but never assigned. This sourceless signal will be automatically connected to value 00000000.
WARNING:Xst:1710 - FF/Latch <shift_reg_1_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_1_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_2_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_3_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2404 -  FFs/Latches <shift_reg_1<7:0>> (without init value) have a constant value of 0 in block <shifter>.
WARNING:Xst:2404 -  FFs/Latches <shift_reg_2<7:0>> (without init value) have a constant value of 0 in block <shifter>.
WARNING:Xst:2404 -  FFs/Latches <shift_reg_3<7:0>> (without init value) have a constant value of 0 in block <shifter>.
WARNING:Xst:1710 - FF/Latch <shift_reg_4_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_4_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_5_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_0> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_1> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_2> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_3> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_4> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_5> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_6> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <shift_reg_6_7> (without init value) has a constant value of 0 in block <shifter>. This FF/Latch will be trimmed during the optimization process.

Once again, any help is appreciated.
Thank you.
 
Last edited:

The warnings about sensitivity lists is because you have decided to place Data_out <= shift_reg; inside the process, but you havent put shift_reg in the sensitivity list. You shouldnt really put this line inside the clocked process, it should be outside.

Secondly, you never assign shift_reg(0), hence values being stuck and 0. And because you shift everything in from shift_reg(0), the whole array becomes '0'. You also never use the data_in signal.

What I think you really want, is something like this:


Code VHDL - [expand]
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process (clk) begin
 if rising_edge(clk) then
   if Scan_Dav = '1' then
      shift_reg <= shift_reg(shift_reg'high-1 downto 0) & data_in;
    end if;
  end if;     
end process;
    
Data_out <= shift_reg;



- - - Updated - - -

Also, the lack of IO pins is because if you make this a top level block it needs to connect every bit to a specific pin. And with a size of 16, thats 256 required just for data out, and you probably dont want to do that. In Altera you can make pins virtual if you plan on connecting to something later (they are not usable) so you can check the logic layout - im sure Xilinx have something similar.
 
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Reactions: verylsi

    verylsi

    Points: 2
    Helpful Answer Positive Rating
Thanks for your answer first of all, I'll have a couple of questions though. I cant believe I forgot to use data_in ( a big lol in my mind...), but how does the method you provided work? What is the function of 'high there? Also to what direction is this shifting? I'll return to I/O pins issue after I make some research.

edit: My RTL schematic still seems to be broken.
 

The 'high is an attribute, and takes the highest index of the shift_reg signal, which in this case would be REGSIZE-1. using 'high can be better than using explicit sizing or generics.
This code shifts data to the left, as you appeared to be trying to do in your first code. If you wanted to shift right you could do:

shift_reg <= data_in & shift_reg(shift_reg'high downto 1);

The & concatenates values together. The type in implied from the use of shift_reg (which is already of type reg_array).
 

Hmm, I've understood it, thanks. However, the component still does not behave properly. The RTL schematic of component itself is still the same with the one in the first post. I am also adding a screenshot of the top module's schematic, see how shifter module disfunctions.

top module.JPG


Code VHDL - [expand]
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use work.mypackage2.all; -- contains the type reg array
 
entity shifter is
    generic ( REGSIZE  : integer := 8);
    port(clk      : in  std_logic;
            Scan_Dav : in  std_logic;
            Data_in  : in  std_logic_vector(7 downto 0);
            Data_out : out reg_array );
end shifter;
 
architecture bhv of shifter is
       
    signal shift_reg : reg_array;
begin
    process (clk) begin
        if rising_edge(clk) then
                if Scan_Dav = '1' then
                    shift_reg <= shift_reg(shift_reg'high-1 downto 0) & Data_in;
                end if;
          end if;
    end process;
     Data_out <= shift_reg;
end bhv;



EDIT: The problem is related with the package. When I change the module, by removing any instance of reg_array and changing them with std logic vectors, and thus obtaining a std_logic_vector shifter, the module is properly depicted in the schematic. So I wonder why the compiler fails and also if I have an alternative solution?

NEW EDIT: Guys I'm totally out of solutions here. I have changed the component but still it seems to fail as long as it has the type declaration inside. What am I supposed to do?


Code VHDL - [expand]
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.numeric_std.all;
 
entity my_shifter is
        port(clk      : in  std_logic;
                Scan_Dav : in  std_logic;
                Data_in  : in  std_logic_vector (7 downto 0);
                O1 : out std_logic_vector(7 downto 0);
                O2 : out std_logic_vector(7 downto 0);
                O3 : out std_logic_vector(7 downto 0);
                O4 : out std_logic_vector(7 downto 0));
end my_shifter;
 
architecture bhv of my_shifter is
 
    subtype byte is std_logic_vector(7 downto 0); -- a byte
    type reg_array is array (7 downto 0) of byte; -- array of bytes
    
    signal shift_reg : reg_array;
begin
    process (clk) begin
        if rising_edge(clk) then
                if Scan_Dav = '1' then
                    shift_reg <= shift_reg(shift_reg'high-1 downto 0) & Data_in;
                else
                    shift_reg <= shift_reg;
                end if;
          end if;
    end process;
     O1 <= shift_reg(7);
     O2 <= shift_reg(6);
     O3 <= shift_reg(5);
     O4 <= shift_reg(4);
end bhv;



The RTL schematic is still the same...:-(
 
Last edited:

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