Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Shield for differential clock

Status
Not open for further replies.

ritchyv

Junior Member level 1
Junior Member level 1
Joined
Jul 11, 2008
Messages
15
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,379
Hi,
I would like to create a shield around a differential clock on the metal2 (Virtuoso Layout IC6.1.5 - IBM 130nm). How do I do this ?

Thanks
 

Adjacent routes on metal2 + wide routes on metal1 & metal3, all connected to GND can make a good all-around-screen. But of course create massive cap losses.

I wouldn't advice it. If your differential clock has good symmetry - both regarding drive strength and fan-out - crossing signals receive opposite stray signals which well cancel out. Nearby sensible inputs could be screened individually.
 

Hi,

You can use normal shielding and co-axial shielding depending upon the critical on those diff nets.

1. Normal shielding -- side by side
Metal2 is you conductor
Add M2 both side of the conductor with 1:2:1 spacing.

2. Co axial

Adding M3 on top sides with width to cover fully the conductor signals
Adding M2 on both sides of the conductor and also drop VIA3-2 to connect M3 and VIA1 to connect M2
Adding M1 on below sides with width to cover fully the conductor signals
Here also you can maintain the 1:2:1 spacing between the shield and conductor.

Thanks,
Basu
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top