Setup to test PM of 2 stage opamp..??

[findsriharsha]

Hi all.!

Could anyone plz explain how to setup to test the phase margin of 2 stage CMOS opamp. Any external link of a tutorial will be highly helpful.

Thank you.
Harsha

 

[tyanata]

What do you mean test:
1. Simulate amplifier which you design?
2. Measure real device?

 

[findsriharsha]

I have designed the 2 stage miller opamp. I am trying to test its performance. I have to meet 70 degree PM. I dont know how to test that. Plz help

 

[mengcy]

Hi,see the attachment it's a fully differential opamp ac character testbench.
The opamp work at an open loop state.
1GF input decoupling capacitor transmit ac signal to each input but prevent the dc signal.
1GH inductor help set up the input operating voltage but prevent the ac signal
Add ac source (+1V, -1V)at each input of the opamp.R2 and R3 are load.

do ac analysis and set a suitable frequency range.
Plot either of the output"ac magnitude and phase".
phase shift at the unity gain frequency = phase margin-180deg.

Or you can use the phasemargin function in the calculator.


If you are designing single ended opamp, you have to short one input to ac grounded and add ac source at the other input.

Good luck!

 

[tyanata]

This setup for AC analysis of differential op. amp is not quite correct, because it presumes that input CM is equal to output CM which is not always the case.

Instead of that I propose you system using voltage controlled voltage sources.

Assume differential op amp with:
1. Input nodes INP and INN.
2. Output nodes OUTP and OUTN.
3. VCM_REF required output common mode voltage.
4. VCM_CTRL node controlling output common mode.
5 VCM_CTRL_ideal required ideal voltage applied to node VCM_CTRL.

I will write the recuired CMFB system in PSpice language you can transfer it to CADANCE, if you use it.

PSpice Syntax VCVS

Ename output_node1 output_node2 input_node1 input_node2 gain

CMFB system:

E1 OUTsim1 GND OUTP GND 0.5
E2 OUTsim2 OUTsim1 OUTN GND 0.5
E3 OUTsim3 OUTsim2 VCM_CTRL_ideal GND 1
E4 VCM_CTRL OUTsim3 VCM_REF GND -1

 

[master.ckt.breaker]

Hi Harsha,
The opamp which you are trying to simulate for PM is single ended or fully differential? Based on that the set-up will change.

MCB

 

[findsriharsha]

Hi all.. thanks for all your comments..
I am very sorry that i forgot to mention: I am trying to find PM of a single ended opamp. Thank you

 

[tyanata]

Since you are going to simulate sengle ended op amp, you can do the simulation with closed loop DC feedback. What I do is to connect AC source 1V to INP (input DC voltage must be as is required in your real application), connect to OUT some load capacitance which emulates application load capacitance plus capacitance of input transistor of negative input, after that I connect in series VCVS (voltage controled voltage source) with Gain=1, after that connect in series 1 GigaOhm resistor, on second pin of resistor I connect 1F capacitor to GND and VCVS with Gain=1. Output of second VCVS is connected to INN.
Observe your open loop gain and phase on node OUT.