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setup optimization at three places

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jitendravlsi

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Hi All,

We do setup analysis and optimization at three different places in PD flow:
-- pre-cts
-- post-cts
-- post-route

Now tell me instead of doing this at three different stages can we do it at any one place, say at post-route stage, and save our time which we give to previous two analysis and optimization efforts.

or in other words

Why it is necessary to do pre-cts setup analysis and optimization.

THANX
JIT
 

Good quesn.. Can you answer this quesn first before some one answers yours?

Instead of eating breakfast/lunch and dinner, why can't we eat only once in a day?
 

    jitendravlsi

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Instead of eating breakfast/lunch and dinner, why can't we eat only once in a day?

we cant eat only once in a day:

1)At once we cant eat three times food. if we will try forcibly then some health issues will occur.

2)If we will eat only once, then that food will not give enough energy to our body for the whole day work.
 

If you add more pessimistic margins and close the design in the pre-cts itself you may not see any violations after post-cts and post-route.

But if you add more pessimism at the early stage itself, you might blow up the power,area to meet the performance requirements.In order to meet design goals with out some of the goals, we add some extra margin which is reasonable at the pre-cts stage and close the design timing (skew+jitter+ocv margin+pre-cts modelling margin + any other margin for example sign off margin).

If you try to close the timing post-route, after all our CAD tools designed by human beings cannot achieve the global or local solution of placement soln.. and routing soln.. simultaneously.

I hope u understood my argument.

Cheers
Teja
 

    jitendravlsi

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a good estimation of time and area aspects of the design leads more clouser to the realistic behaviour of the chip.

So pre-cts stage is also equally important for a better estimation of the design and avoids last minute surprises.....

good luck

Sunil Budumuru
 

    jitendravlsi

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a good estimation of time and area aspects of the design leads more clouser to the realistic behaviour of the chip.

So pre-cts stage is also equally important for a better estimation of the design and avoids last minute surprises.....


Dear Sunil

what is this realistic behavior of the chip?

thanx
jit
 

in broad sense realistic behavior of a chip is nothng but the manufatured chip that meets your design specifications and design requirements.

realistic behavior deals not only with the pre cts (what we are discussing here)
simply, ot indicates the exact requirement in terms of timing area operating conditions application etc..

regards,
SunilB
 

    jitendravlsi

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