snake0204
Newbie level 5
Hi Guys,
I need a little advice here with Xilinx XUP board. I developed a HW accelerator for a video processing task. I write pixel data along with some additional data word by word to HW accelerator through software, but this writing data through software is slowing the system down, in the sense I am getting very low frame rate.
Unfortunately there is not enough BRAM space on the FPGA to store the whole frame and the additional data, so I have to store all this data on SDRAM and write it to HW bock pixel by pixel and then frame by frame.
I am using a Xilinx XUP board with linux running on the PPC. One ideal solution would be to have a DMA and write a device driver but I don't have resources and expertise in this area....is there any easy way around this bottle neck.
Thanks
Ramc
I need a little advice here with Xilinx XUP board. I developed a HW accelerator for a video processing task. I write pixel data along with some additional data word by word to HW accelerator through software, but this writing data through software is slowing the system down, in the sense I am getting very low frame rate.
Unfortunately there is not enough BRAM space on the FPGA to store the whole frame and the additional data, so I have to store all this data on SDRAM and write it to HW bock pixel by pixel and then frame by frame.
I am using a Xilinx XUP board with linux running on the PPC. One ideal solution would be to have a DMA and write a device driver but I don't have resources and expertise in this area....is there any easy way around this bottle neck.
Thanks
Ramc