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[SOLVED] section maps in ccs & pros and cons of using DSP/BIOS

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ahmadagha23

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ccs sections

Dear
friends;
1-Do you know the advantages and disadvantages of using DSP/Bios? I think DSP/BIOS is a graphical user interface for setting required setting to work with DSP and we can do all DSP/BIOS features without using DSP/BIOS. DSP/BIOS simplifies settings but required more memory and MIPS; isn't it?



2- Which sections must be defined by SECTION{} in .cmd file for a specified project? In other words there are many sections that can be defined like: cinit,vectors,const,bss,cio,stack,sysmem,data,far,sysinit,trace,hst,gblinit,sys clk,args,PMEM$heap,DMEM$heap(PMEM and DMEM are specified in MEMORY{}).

How can I understand which of these section must be defined?



3-Are the names of sections are specified and predefined and limited in linker or user can define himself?



4- If the user didn't define a required section for a project in command file(.CMD) does it work properly? Is displayed a warning or error message by CCS?



regards
 

sections in ccs

Hello,

1-
I'm not using it currently, but i think DBP/BIOS is a basic operating system which makes peripheral and multitask handling easier. Does require more memory and MIPS...

2-
You will find your answer in section 4.3 of SPRU514 (download from TI.com).

>How can I understand which of these section must be defined?
It depends on your code. I'd recommend starting from the TI code examples corresponding to your DSP and then building from their CMD file. Make sure you check with your DSP memory map.


3-
You can define new ones if you want to. Some names are reserved.


4-
I believe so, the linker will not be able to do its job.

Regards,
S
 

ti section file cmd

Dear
I am very glad to see your reply and know you as an experienced DSP worker.
I have a project for c54cst, which its source size is more than a whole page size (it is near to 140KB). So I must divide it to multi files and map the resulted .obj files in seprated sections. But there is two questions: First, How can I construe that in which memory region and address space I should map each section (each .obj)? Is it arbitrary? Consider that the some of same space, .text for example, of all .obj files is more than one page.
Second, my runtime memory is restricted to on-chip memory space, so it seems that there is more than one memory regions with same run time address. Is it troubling problem in this condition? Have we consider any limitation?


I want to implement my melp based codec on C54CST; did you know this chip and did you have any recomendation?

Can I Load my program to c54cst on EVM without using emulator (only by UART and AT commands)??? If yes what is the procedure steps?

Regards
 

.far section ccs

Hi,

I'm currently using the 320F28xx family and i don't have knowledge of the C54.

The way to go in terms of allocating your file to different memory sections is (after you create these memory sections) to use the #pragma directive.
example:
in my CMD file, i'd have:
in MEMORY
PAGE 0:
FLASHB : origin = 0x3F0000, length = 0x004000 /* on-chip FLASH */

in SECTIONS
FL_B : > FLASHB PAGE = 0

then, in your C file, you could have:
#pragma CODE_SECTION(Function_name,"FL_B")
where you assign "Function_name" to the section FL_B.
By assigning your different functions to different sections you can split your program among the available memory areas.

I know that the DSPs i'm using can be flashed with RS232 and CAN, check the bootloader documentation of your DSP to see what options you have.

Regards,

Samuel
 

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