SCR Crowbar - latching current and gating current question

[Magnethicc]

Hi Everyone,
A question regarding SCR in Crowbar circuit:

As soon as the current in Q1 gate (SCR Gate) reaches its gating current then Q1 will decrease the voltage across its gating circuitry thus reducing the gating current.
assuming that the holding current has not been reached yet, what exactly prevents Q1 from shutting itself off? is there some kind of hysteresis to the gating current?

Thank you.

 

[danadakk]

SCR Turnoff -

SCR Turn OFF Methods: Natural, Forced Commutation

Different SCR Turn OFF Methods like Natural, Forced Commutation are explained. In Forced, Class A, B, C, D, E. Dynamic turn OFF Characteristics.

www.electronicshub.org

Regards, Dana.

 

[crutschow]

As soon as the current in Q1 gate (SCR Gate) reaches its gating current then Q1 will decrease the voltage across its gating circuitry thus reducing the gating current.
assuming that the holding current has not been reached yet, what exactly prevents Q1 from shutting itself off? i

Once the required gate current is reached, that current will remain until the SCR turns on.
Assuming there is enough current from the power supply output to exceed the SCR's hold current, then it will stay on until the fuse blows.
An SCR stays on without gate current, once it has been triggered.

 

[dick_freebird]

SCRs are strange critters and getting GTO action is special art. The in-looking vs out-looking base resistance is key. You may need both gates exposed to discharge in order to really shut it down and that's not a feature. GTO may involve embedding that bleed in the layout, at least on the side not brought out to the cathode-gate.

Got a patent on an IC SCR for HV ESD protection back in the '90s that I made GTO by that kind of layout engineering. Though with so much magic sand it was more a "try 'em all and hope one works" affair, one did.

 

[KlausST]

Hi,

As soon as the current in Q1 gate (SCR Gate) reaches its gating current then Q1 will decrease the voltage across its gating circuitry thus reducing the gating current.
assuming that the holding current has not been reached yet, what exactly prevents Q1 from shutting itself off? is there some kind of hysteresis to the gating current?

How can this be?
Is the power supply current limited to microamperes or very low milliamperes? If so, your 1st should have stated so.

***
Without knowing how the power supply behaves, What Q1 and ZD1 you are using, what values all the parts have .. we are limited in the discussion.
Many different things can happen .. depending on the circuit.


Klaus

 

[dick_freebird]

There are three connections to the cathode gate (NPN base, PNP collector, the outside world).

Once you have energized the NPN and it pulls the PNP to life the PNP keeps the NPN awake and vice versa. These are not independent devices, they are region-trios within the 4-layer structure and the "anode gate" is not brought out.

For GTO you must extract more than PNP collector current from the cathode gate. Then the PNP will be starved and turn off after its storage time, and -then- NPN go sleepy.

All much easier, like for free, in AC applications where the periodic reversal does it for you if you just don't retrigger.

 

[Magnethicc]

Once the required gate current is reached, that current will remain until the SCR turns on.
Assuming there is enough current from the power supply output to exceed the SCR's hold current, then it will stay on until the fuse blows.
An SCR stays on without gate current, once it has been triggered.

I think that what's holding the gate current at the required level is the C2 in the figure in the post. Because if SCR turns on and there is no capacitance to provide the gate current then gate current will drop together with the Cathode Anode voltage of the SCR which can lead to it being turned off, I think.

SCRs are strange critters and getting GTO action is special art. The in-looking vs out-looking base resistance is key. You may need both gates exposed to discharge in order to really shut it down and that's not a feature. GTO may involve embedding that bleed in the layout, at least on the side not brought out to the cathode-gate.

Got a patent on an IC SCR for HV ESD protection back in the '90s that I made GTO by that kind of layout engineering. Though with so much magic sand it was more a "try 'em all and hope one works" affair, one did.

Note to self to learn a few more terms:
- in-looking and out-looking resistance of an SCR
- GTO
You seem quite Knowledge in the relm of SCRs

Hi,


How can this be?
Is the power supply current limited to microamperes or very low milliamperes? If so, your 1st should have stated so.

***
Without knowing how the power supply behaves, What Q1 and ZD1 you are using, what values all the parts have .. we are limited in the discussion.
Many different things can happen .. depending on the circuit.


Klaus

Assuming that everything is ok with the circuit and the power supply, is the behavior of shorting the source of the gate current can lead to the SCR being turned off before reaching it's holding current?
I think this is a better worded question
Thanks!

There are three connections to the cathode gate (NPN base, PNP collector, the outside world).

Once you have energized the NPN and it pulls the PNP to life the PNP keeps the NPN awake and vice versa. These are not independent devices, they are region-trios within the 4-layer structure and the "anode gate" is not brought out.

For GTO you must extract more than PNP collector current from the cathode gate. Then the PNP will be starved and turn off after its storage time, and -then- NPN go sleepy.

All much easier, like for free, in AC applications where the periodic reversal does it for you if you just don't retrigger.

In the case above I want to make sure that it will not shutdown but rather continue to be active for the fuse to blow but not so sure how does one maintain the gate current while simultaneously in the process shorting source of this gate current.

 

[FvM]

Don't understand how the term GTO comes into play. The original circuit has no relation to gate turn-off operation. It's also impossible to trigger under conditions that won't cause SCR latching. Current is at least temporarily provided by C1.

 

[danadakk]

Ref material, attached.