dft scan chain
For scan insertion, DFT engineer usually will work with design engineer to define the scan in, scan out, scan enable, scan clock ports and number of scan chain required, all these are test constraint required for scan insertion.
In general, the dft tools will use your test constraint provided,
1) replace all your normal flops with scan flops (flop with dont touch attribute will not be replaced).
2) Stitched all the scan flops together to a number of scan chain specify.
3) ATPG tools will then use to generte the test vectors for the design.