kingh12
Newbie level 4
- Joined
- Mar 26, 2013
- Messages
- 6
- Helped
- 0
- Reputation
- 0
- Reaction score
- 0
- Trophy points
- 1,281
- Activity points
- 1,335
Hi,
I've been lost in a big trouble with the capacitor charging. First let me summarize you how does this circuit works. When the positive square wave signal reaches pnp transistor, the transistor becomes reversed biased and it doesn't work. By time time the transistor doesnt work, the capacitor starts to charge through DC power supply until negative square wave signal comes. When the negative signal comes, transistor starts to conduct and the voltage charged on the capacitor discharges rapidly. So, we get the sawtooth signal on output. This is the purpose of this circuit.
My first question is the capacitor charges by the DC power +12V? I mean when we used the formula Vc(t)=V(1-e^-t/RC) , the symbol "V" is my DC power +12V? Or the emitter voltage Ve? Or the voltage on 15k ohm resistance?
If the answer is 12V, when I used the formula for 47nF capacitor, I found that the capacitor must be charged until 6,02V. But when I praticcally observe this situation on ossiloscope the signal on the capacitor reaches rapidly to 4V and stays on 4V until the transistor starts to conduct.This means capacitor reaches its high voltage which is 4.
How can this happen? If it will become to its high voltage doesnt it have to be 12 V?
Here is the circuit of my project on attachment
I will be very glad if you solve my problem. Thanks
I've been lost in a big trouble with the capacitor charging. First let me summarize you how does this circuit works. When the positive square wave signal reaches pnp transistor, the transistor becomes reversed biased and it doesn't work. By time time the transistor doesnt work, the capacitor starts to charge through DC power supply until negative square wave signal comes. When the negative signal comes, transistor starts to conduct and the voltage charged on the capacitor discharges rapidly. So, we get the sawtooth signal on output. This is the purpose of this circuit.
My first question is the capacitor charges by the DC power +12V? I mean when we used the formula Vc(t)=V(1-e^-t/RC) , the symbol "V" is my DC power +12V? Or the emitter voltage Ve? Or the voltage on 15k ohm resistance?
If the answer is 12V, when I used the formula for 47nF capacitor, I found that the capacitor must be charged until 6,02V. But when I praticcally observe this situation on ossiloscope the signal on the capacitor reaches rapidly to 4V and stays on 4V until the transistor starts to conduct.This means capacitor reaches its high voltage which is 4.
How can this happen? If it will become to its high voltage doesnt it have to be 12 V?
Here is the circuit of my project on attachment
I will be very glad if you solve my problem. Thanks