Sampling phase detector

[hareeshnk]

sampling phase detector

I am currently designing a PLL at 2 GHz using SPLD. Has anyone done temperature cycling of the cricuit and PLL is able to track the VCO or DRO temperature variations ? Regarding the sweep cricuit, I am using a wein-bridge oscillator and biasing it to the desired voltage level. But I found the amplitude of the oscillator is not stable. Can anyone help me on this ? Also, How much power level you re feeding to SPLD. Currently, I am using 23 dBm , which I found very high..any idea for reducing the power requirement.

 

[dipika selvam]

hi
i m working on the similar topic "Desiging a pll at 2 Ghz using SPLD " and also most of other parameters being similar to hareeshnk's design ! now, also i need to generate a lock detector circuit for the pll.. plz help!!!! i need it ASAP!
Thank u in advance....