Sample and Hold ktc noise with oversampling

[leoeltipo]

Hi all,

I am new to noise analysis. I am reading the book Low-Noise Electronic System Design from Motchenbacher. In the list of exercises of chapter 1), there is an exercise with a ideal sample and hold circuit. The capacitor is 1 pF and it has a parallel resistor of 1 GOhm. The question is, what's the rms value of the noise at the output with:

• T = 1 us,
• T = 1 ms,
• T = 1 s.

The sampling is the square wave with 50 % duty cycle and the three options given above.

My confusion is because, in any ktc analysis with sample and hold, it's supposed the sampling frequency is lower than the cut-off frequency of the low-pass given by R and C. In this case, it seems like there is an oversampling. However, if my understanding of the ktc noise is correct, if the bandwidth (sampling frequency) is bigger than this noise bandwidth, all ktc noise will be integrated if no further filtering is done.

The best part is that the answers are available, but I have no idea how to get there.

Any suggestion would be of great help.

Regards,

 

[KlausST]

Hi,

What is "ktc"?

it's supposed the sampling frequency is lower than the cut-off frequency of the low-pass given by R and C. In this case,

I don't think so. The sampling frequency should be higher than 2x fc. ....according nyquist.

Klaus

 

[FvM]

I'm missing a complete problem description. Is the S/H sampling a noisy input signal or is the resistor considered as only noise source?