sample and hold circuit

[akbarza]

hi
can any one explain to me how the attached circuit works? especially in holding phase?
the pic belongs to below paper :
"A high-speed sample-and-hold technique using a Miller hold capacitance"
P.J. Lim ; B.A. Wooley- https://ieeexplore.ieee.org/document/75067

thanks

 

[barry]

It doesn't work- you've got a floating input. Where does the noninverting input go?

 

[FvM]

N.I. input grounded.

As described in the paper, it's a modified open loop SH topology. In hold phase, you have holding capacitor C2 multiplied with OP gain A. The main purpose of the circuit is however in managing switch charge injection during transition phase.