[SOLVED] ROM implementation on FPGA

[acbelgad]

I used single port ROM ip core in my vhdl code. How to write ROM with initial values.

 

[mrflibble]

Did you find the datasheet pdf that goes with that ip core? It usually mentions how to provide initial values and such.

 

[vlsi_whiz]

If you're using Xilinx IP, then when you generate the IP core using coregen, you can add the initial values via the coregen itself. You may need the values in a hex format or any other one specified by Xilinx. You can get this information from the ISe user guide as well as the cores user guide.

 

[imbichie]

When you are generating the IP, there is an option to load the initial values which are in a *.ini or *.hex file.
You can choose the file (the data width and depth need to take care) and load the data.

 

[Analog Ground]

With Altera Quartus II, a ROM is instantiated with a Megafunction. An "mif" file is commonly used to specify the contents and defined as a parameter for the ROM.

 

[ahmad1954]

when you define block ram with coregen, you can put a file with coe extension for initial value. there is a similar way for rom.