[SOLVED] RMS Voltage Calculation

[am85]

Hi,
I am currently working on a project to calculate the RMS voltage, RMS current and phase difference using an FPGA. First an ADC will convert the analog signal and then the FPGA should process the digital data and calculate the three values. I would appreciate it if anyone can help with the following questions. I am using a spartan 6 FPGA.

1) Which algorithm is the best to use: summing up the squares of all samples from the ADC til the voltage is zero, dividing by n then getting the square root
OR finding the peak voltage and then dividing by the square root of 2.

2)Do i need to filter the signal coming from the ADC first before performing the calculations? which filter to use?
I tried implementing a moving average filter using the FIR core in Xilinx, but when i set the coefficients to fractions as 0.3 for getting the average of the values, i get strange outputs from the filter. there are also several filter types and architectures available in the core, which confused me.

3)what would be the fastest method to perform these calculations? is it creating a coprocessor for microblaze and using the hardware FPU for parallel calculations?

sorry for the numerous questions and thanks a lot in advance.

 

[FvM]

If the input signal aren't guaranteed to have a clean sine waveform (they hardly will), a true RMS measurement is required. It can be only performed by summing the squares.

For the RMS measurement, filtering of the input signals doesn't make much lsense, unless you have high frequency noise that you want to contribute to the measurement. In this case, I would prefer an analog filter. A "popular" mistake in FIR filter configuration for low frequencies is to use fewer taps than required. Filters with large fc/fs ratio can be often better implemented as IIR.

You can also implement the calculations in plain HDL code without a software processor.

 

[am85]

Thanks for your reply. OK then i should better use summing the squares, but in this case should i use a filter?
if yes then which filter type and architecture in the FIR core should i use, there are single rate, Interpolation, Decimation and Polyphase. There are several architectures like systolic multiply accumulate, transpose, or distributed arithmetic. Is it correct to use fractions for the coefficients?

I am only using microblaze to handle the interfaces (ETHERNET, SPI, SATA) which i think would be difficult to control without the processor. As for the calculations i will perform it using HDL code which utilizes the FPU.

 

[FvM]

If you are implementing a soft processor anyway, it may be reasonable to use it also for the signal processing, as long it can handle the data. I assume that your measurement is 50 Hz related, which isn't very critical.

 

[am85]

Thanks for the information.
Do I need a filter before performing the summation of the squares?

 

[permute]

maybe. both methods give different but useful information. unfiltered includes the harmonics (and noise) in the signal, and is more applicable to wideband signals (like music). filtering can be used to select a specific frequency and possible its harmonics.

 

[am85]

Yeah true but what if i am calculating the RMS Voltage, wouldn't this noise result in a wrong calculation? and which filter do you think i should use? I was trying to implement a moving average filter using the FIR core of Xilinx but having difficulties setting all the parameters in the Core Generator.

 

[FvM]

Yeah true but what if i am calculating the RMS Voltage, wouldn't this noise result in a wrong calculation? and which filter do you think i should use?

It's a matter of your specification, if the "noise" contribution to the RMS measurement is considered as an error. If you refer to a current measurement, all harmonic components are actually causing conductor losses and have to be measured so far. But you may want to specify a bandwidth limit.

For the filtering, if not already provided in the analog domain, I would prefer a simple resource saving CIC decimation filter, as it's often implemented in oversampling ADCs.

 

[am85]

Thanks a lot you have been of great help