[SOLVED] Rising and Falling Edge Detection using SystemVerilog Macros?

[lithium]

I was trying to write a macro for this but ran into problems when I wrote one for falling edge because of re-declaring intermediate logic

// Rising Edge Detection Logic
`define RISE_EDGE_DET(out, in, clock, rst_b) \
begin \
logic inF; \
`MYFF (inF, in, clock, rst_b) \
// Rising edge detection \
always_comb out = in & ~inF; \
end

If I declare a similar one for falling edge, I have use a signal different from inF as the compiler complains that it has been declared twice.

Is there any way to make this generic instead of defining a 'module'?

 

[lithium]

I figured it out....
We have to use in``F

// Rising Edge Detection Logic
`define RISE_EDGE_DET(out, in, clock, rst_b) \
begin \
logic in``F; \
`MYFF (in``F, in, clock, rst_b) \
// Rising edge detection \
always_comb out = in & ~in``F; \
end

I tested this and it works!