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Ripple carry adder is just series of full adders connected serially where carry propagates from first full adder to last one.
Delay is maximum in this case because the output will not get generated until carry has propageted until the last full adder.
Carry look ahead contains combinational circuit which calculates before hand. Area is larrgely increased in this case. Of course delay is much less.
Parallel adder is somewhere in-between. Suppose we have to add 16 bits then we divide it into 4 ripple carry adders and feed carry in to higher bits using a combinational circuit (just like CLA) therefore it will take same dlay as of 4 bit ripple carry adder and will have lesser area as of 16 bit CLA. its a trade off.
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