Non AMP

Ring oscillator using FFGA

Thread starter AskarMK
Start date Nov 16, 2013

Status: Not open for further replies.

Nov 16, 2013

#1

A

AskarMK

Newbie level 1

hi
gud aftr noon evrybdy
how much frequency can be expected from a three stage ring oscillator implemented on fpga board?

Status: Not open for further replies.

Similar threads

R
full subtractor using case statement...plzz tell me error
- Started by rids1
- Jan 11, 2014
- Replies: 3
Verilog HDL
A
D latch using wait statement
- Started by aptronics
- Jul 6, 2013
- Replies: 3
Verilog HDL
U
Morse code implementation using verilog
- Started by uhanna
- Feb 1, 2013
- Replies: 0
Verilog HDL
A
Image rotation using verilog
- Started by arjunraj
- Nov 29, 2012
- Replies: 0
Verilog HDL
P
Interfacing Spartran 3 board with pc using USB
- Started by priask
- Jul 31, 2012
- Replies: 2
Verilog HDL