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[SOLVED] right logical shift /different width between input and output

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alkaios

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i want to implement the following operation in vhdl:

x(52:0) = y(23:0) >> z

(>> is the logical right shift)

value of z is not standard, it's the result of a substraction and it can change.
i already tried operator srl and function shift_right but they don't work because of the different width of x and y.
i can't use '&' operator because z doesn't have standard value.

any suggestions how can i do this?
 

how about this:

x <= resize( y srl z, x'length);
 
i didn't know the function resize.
i found out how to use it, and got my desired result.
thanx a lot.
 

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