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RFPA : drain to source breakdown voltage

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whlinfei

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Hi All,

Does anyone use Chatered 65nm process, CH65LPe ?
I couldn't find the drain to source breakdown voltage for I/O FET.

The highest nominal Vdd is 2.5V. Burn in is around 3.8. But for PA design, the maximum drain to source voltage is above 2 times Vdd.

Please help.

Best Regards,
whLinfei
 

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