mistyme
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To our RF experts,
Kindly share your experiences on this: I did a MWO simulation for a 20W UHF broadband amplifier (470MHz to 900MHz). The simulated linear gain is around 17 to 19dB. Available test eval board of the transistor in standard Push-pull class AB config has a gain of around the same range.
After verifying my prototype design (balanced class AB), the gain flatness is really in a mess and the small signal gain dips reaches as low as 3dB.
I attached the plots. The red plot is the test eval board in Push-pull Class AB and the blue plot is for Balanced Class AB.
Any additional insights on solving the gain and the flatness issues?
Kindly share your experiences on this: I did a MWO simulation for a 20W UHF broadband amplifier (470MHz to 900MHz). The simulated linear gain is around 17 to 19dB. Available test eval board of the transistor in standard Push-pull class AB config has a gain of around the same range.
After verifying my prototype design (balanced class AB), the gain flatness is really in a mess and the small signal gain dips reaches as low as 3dB.
I attached the plots. The red plot is the test eval board in Push-pull Class AB and the blue plot is for Balanced Class AB.
Any additional insights on solving the gain and the flatness issues?