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request potential interviews questions on SAR ADC

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airboss

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I'm currently looking for a job in the analog and/or mixed-signal IC design right now. I was assigned mainly to the digital core when I was working on the SAR ADC. I do put it on my resume but most of the people questions me on the analog core. So can people throw out some potential questions? I really appreciate.


The questions I have so far are:
*) what's the challenge of the design for the comparator?
*) what's effect that the offset has on the comparator? how do we cancel the offset?
*) what's the topology for the comparator? if latch is used, what's the benefit of using a latch? why pure linear amps or pure latches?
*) what's the challenge for the ckt related to the reference voltage?
*) what's the topology of the DAC? what's the challenge of the DAC?
*) any non-linearity issues coming from the DAC? what's the solution?


There was one question I'm still not able to answer up till now.
*) how much time do i need to resolve the LSB? (i mean, we resolve one bit within one clk cycle, so this question itself doesn't make sense to me.)
 

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