A non-ideal current source will keep altering the bias points, modulating it with the input signal, and hence varying the small-signal gain too. As a result
the output gai nwill have a dependence on the input CM level. Mismatch obviously will result in differentia lgain variation - which can be viewed as common mode gain.
For a rough idea of how much the CMRR will degrade due to mismatch, you can simply use slightly different aspect ratios (maybe +/- 1%) for the two input transistors, or for that matter any components that need to be matched.
I've also heard that PSRR is a manifestation of voltage offset, but haven't quite been able to see why? Any insights on that?