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Regarding Test point queries ??

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kabaleevisu

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Hi everyone,
i need to generate the testprobe report.i did not create any test point so i need to generate via as the test probe ,so i have some clarification.
if more then 5 vias used how to assign as testpoint
is there any spacing need to maintain between testpoint to testpoint ??
 

Type of testing to be utilised... Flying probe, bed of nails etc.
Density of circuit...
What software are you using....
There is no simple answer, believe me, its one area where everyone has to get together and discuss the options.... including whoever is going to build the test jigs.
I have done HDI boards with 0201s and the test jig people said 2.54mm between test pins, yeah right, quite often testing is even further back in the dark ages than PCB design in general, it can be so prehistoric in their requirements that it is a joke.
 

Whilst Marc may consider it a joke, if a test jig is being made with the larger test probes then they need 0.1"\2.54mm between the centres so that the web between drilled holes does not break when the bed is under pressure.

There are thinner probes that allow closer test points however ISTR that they cost a little more and are not as durable (being thinner).
If your happy paying for repairs more often then go for the thinner probes & higher testpoint density.


You should not be using vias as test points, it's frowned upon as the probe may test but damage the via.
Although many still do.

Much of the PCB industry is still old technology, take Marc above - he's ancient :) :) :)
 

hi ,
Thanks for your reply. i am using cadence allegro. I need to generate the test probe report. but I could not generate the test report for smd test point.let me explain how much distance I need to keep one test point another test point ??
 

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