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regarding "real data type" in vhdl not synthsizble

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meher kalyan

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hi ,
I need to define floating number (which is data type of real in VHDL) ,came to know that real data type is just for simulation purpose and its practically "not synthesizable". so how can I define these floating numbers so when I use FPGA these float numbers are synthesizble

thank you in advance
 

use a std_logic vector and Floating point cores from your chosen vendor.
 

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