Hi;
I am not an expert on that, but some background on LVDS type LCD panels.
Based on that, you need to connect MIPI_DSI_CP/N of CPU board to TCP/N pins of LCD. Those are differential high speed signals. Connect N(egative) to N, P(ositive) to P. Similarly, use MIPI_DSI_DP0/N0 to TDP0/N0 pins of LCD.
As the screen resolution increases, number of lanes increases (to be able to transfer image, because each lane has a limited bandwidth capability in Mbps). Since your LCD is 1.54" its resolution should be ok for 1-lane.
Check LCD spec carefully, it may be request some power up timing for VDD and IOVDD (ie one should be ramp earlier than other etc).
Somehow, I also expect that, you need to configure CPU board to drive LCD over 1-lane with defined resolution information.
Hope helps.
Good luck!