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regarding metal layer thickness

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vinayshivakumar

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I have 2 questions regarding metal layer thickness in asic processes :

1) Why is it that the upper metal layers are thicker ??
2) Why is there a minimum metal density DRC check on the metal layers ?

Regards,
Vinay Shivakumar
 

Designers are nothing to do with the thickness the only factor which depends is width........we will vary the width bcz the resistance will be low so tht the IR drop will be less.....And the thickness is a fab issue we are not going to do anything with the thickness bcz its not in our hand


There is a minimum metal density check because when we do fabrication then at tht time they have to concentrate on the density right? so we have to concentrate on rules..like Chemical mechanical planiariazation and so on
Hope it is clear for u
Bye take care
 

1) Upper metal layers are thicker because they are typically used for power routing. You need thicker metal for higher current density. Basically designers request a thicker metal from the fab.

2) CMP. During processing of the wafer, you need to ensure sufficient planarization. Otherwise the fabrication becomes funny. Hence polishing. But in order for polishing to be done properly, you need each "layer" to be sufficiently "spread out" . Hence minimum metal density. But density may be irrelevant if the fab helps you handle it - dummy insertion. You can ask the fab further on this.
 
And one more point is For not to have any density related problems like Erosion, Dishing and to achive uniform etching rates we give more importance to minimum metal density...Hope it is clear for you.
 
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