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regarding fpga's global clock.....

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kil

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hi all,

i have a basic doubt in fpga. In fpga there will be different banks and can we supply different clock to each bank to global clock pin. in that case

how i should give them i have to give 66mhz clock to one bank in fpga and other bank if i am giving 77.76mhz clock and another bank i am giving 155.52 mhz does this effect the functionality of the fpga. or is it acceptable.

since each clock is form differen ossilator does these banks and the logic of related banks will be in asynchronus nature to the logic of other banks.

i have vref in each bank of fpga for what it is used and when we should supply vref to the bank of each fpga.

in the same bank as the primary and secondry global clock multiplxers are shared to same input pins whether i can give differen clocks say 77.76 mhz to primary pin and 66mhz to secondry pin in the same bank. how about when it comes to lvds input to any bank to primary and secondry input pins.


regards
kil
 

There is o problem to routed several clock rates at everywhere in the FPGA.
Every FPGA has what called Dedicated Clock Path.

If you will use the correct CLOCK pins of the FPGA then the fitting tools will routed it automatically in the global paths.

You should take care that you are using the correct pins of the clock that you can get it from the datasheet.

If you will drive the FPGA with clock but not that PINs so you will have timing violations and at high rates the design will not functions correctly.
 

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