REGARDING DECOUPLING CAPACITORS

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rajesh6821

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dear friends,
I am working on spartan3E FPGA family (XC3S250E).. I would like to know how to select the decoupling capacitors in PCB design and on what basis the values for capacitors has been chosen? What capacitor values are recommended?
 

Hello Rajesh,
This is Power integrity issue...
Decaps lie between 10 uF to 10nF
1) Lower Frequency caps help us in filtering High frequency noise.
2) High value caps like 10uF act as local storage capacitors. they normally cannot respond to high frequency current requirements

For more clarity kindly go through the following web seminar.

https://www.mentor.com/products/pcb...zing-power-delivery-decoupling-webinar/?clp=1
 

You can try as part of the circuit simulation.
 

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