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The bandgap voltage is actually is captured as a sum of I*R and a VBE. The PTAT current into a PTAT resistor will capture a PTAT voltage. Now, VBE has a CTAT voltage. The bandgap circuit mixes both of them to get a temperature independent voltage reference, which equals energy bandgap of silicon at 0 K.
Now, the bandgap equations will show an independence of the VDD, as there is no term from VDD contributing to it. This is true in all the cases as long as the current generators have very high impedances. This usually happens in the saturation condition. Anyways, PSRR is determined by how deep these transistors are in saturation.
i am wrk on low voltage bandgap circuti
for error amp i am using the two stage ota( with single pole )
first stage is gm1/gm2 and second stage is common source amp
for this architeucture is am getting only 40dB gain
so is this gain is sufficient for error amp.
if not so can i go for two stage miller amp ==> but i doubt that for error amp this architecture can i use (as the stabiltiy problem may arise due to miller cap and resis)
low voltage??how low? this bandgap circuit's power supply at least larger than bg voltage itself.
surely, the two stage miller compensated opamp canbe used.Why you have that doubt? the opamp is used to regulate pmos' gate,
I think 40dB gain is not enough to supress the power supply noise, ie, PSRR is not high enough. Maybe in you spec, it can be torlered.