Jul 24, 2012 #1 K kumar781 Newbie level 5 Joined Jul 5, 2012 Messages 8 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,322 how a project on low power vlsi cmos digital design helps in future. and on what field we should choose are project regarding low power cmos digital design so that it will help us for development in vlsi career.......
how a project on low power vlsi cmos digital design helps in future. and on what field we should choose are project regarding low power cmos digital design so that it will help us for development in vlsi career.......
Jul 24, 2012 #2 yadavvlsi Advanced Member level 3 Joined Nov 19, 2010 Messages 977 Helped 487 Reputation 972 Reaction score 459 Trophy points 1,343 Location Bangalore, India Activity points 6,991 Power is one of the biggest challenge in sub-nanometer designs. So any thing on low power will be good. https://asic-soc.blogspot.in/2008/04/low-power-design-techniques.html
Power is one of the biggest challenge in sub-nanometer designs. So any thing on low power will be good. https://asic-soc.blogspot.in/2008/04/low-power-design-techniques.html