Reg: ADC (XPS Delta-Sigma ADC) in EDK-SPARTAN6-LX9

[mano1988]

Hi,

Am using SPARTAN6-LX9 FPGA and trying to add an ADC to my system (microblaze). Also am using Xilinx 13.2-embedded edition.
I found the ADC/DAC(PLB) cores in the IP catalog. While going through the architecture of the ADC core I found that the analog input gets compared to a deltasigma 1 bit DAC output (built-in) and that also DAC output passes through a lowpass filter(RC).

If I want to use the core, should I implement a comparator and a RC filter(low pass) externally (FPGA-MICROBLAZE)???

Else should I go for the PMODS (PmodAD1 - Digilent). Hope I would have to implement a SPI communication to use the PMOD (or any external Device)!!!

Could anyone provide me a solution to start up with?

Thank You,
Manoj

 

[mrflibble]

The external RC filter is definitely needed. The external comparator is optional, depending on the implementation details. If you don't want to think too hard use an external comparator. If you want to read datasheets and learn about the precise specs of the differential inputs, you can also use a differential input on the spartan-6 to do the comparator function for you.

 

[mano1988]

Hi,

Thank you for the reply.

For the time being, I have planned to use the PMODs for the ADC in my design. But should I write any driver to interface the PMOD with the microblaze (as one in the "DEMO-Pmod DAC-to-ADC Loopback Reference Design" by AVENT).