Dean Banerjee has an excellent App Note/Book at National Semiconductor on PLL design.
**broken link removed**
An integer-N PLL has to have an integer as the ratio of the VCO frequency and the comparison frequency. For example, a 200 kHz comparison frequency will give you output frequencies that are multiples of 200 kHz. Generally, there is a divider between the reference oscillator and the PFD, so you can use a 12 MHz Reference Oscillator, divide it by 60, and get a 200 kHz comparison frequency.
I'm not sure why kspalla thinks your frequency plan won't work. Your 2nd IF needs a 100 kHz comparson frequency, but that shouldn't be a problem.
The equation on page 11 that BigBoss is looking at is equation 1 and 2. Read the text around that one. This indicates that there doesn't need to be an integer relationship between the comparison frequency and the VCO Frequency. For example, you could use Fvco/Fcomp = 12.3402 and have the dividers give you that ratio.
Take some time and look through Dean Banerjee's book, that should answer most of your questions. Analog devices also has some software you can download and use for design, I think it's called easypll.
Dave
www.keystoneradio.com
Since the ADF4252 is a fractional N synth