Redundancy analysis algorithm

[mtdanaras]

i need the VHDL coding for built-in redundancy analysis algorithm.

 

[TrickyDicky]

you seem to have some code already!

 

[mtdanaras]

[/No i dont have coding but i hav algorithm related to that.​

 

[TrickyDicky]

whats the code in the other post?

 

[mtdanaras]

i dont gei dont get u wat u r asking for

 

[TrickyDicky]

What is this then?
https://www.edaboard.com/threads/291317/

 

[mtdanaras]

What is this then?
https://www.edaboard.com/threads/291317/

This is the algorithm i have for redundancy analysis algorithm
LRM_FC(){
ra=r; ca=c;
foreach(faulty_cell_detected()){
(R̂ ,Ĉ)=fauly_address();
Px=matching_tag_index(TR, R̂) or Next_available_tag(TR);
Py=matching_tag_index(Tc, Ĉ) or Next_available_tag(Tc);
If(Px>=m or Py >=n) {LRM_SA();}
TRpx =R̂;
TCpy =Ĉ;
Bpx py =1;
}
LRM_SA();
}
LRM_SA();
If(ra==0 or ca==0){
Check_Early_Termination();
If(ra==0) Allocate_spare_column(Tcj, Aj);
If(ca==0) Allocate_sspare_row(TRi,Ai);
}else {
For all i, 0<=i<m{
CRi=ones_count(Bi);
If(CRi>ca){Allocate_spare_row(TCRi);}
}

For all j, o<=j<n{
Ccj=ones_count(Bj);
If(Ccj>ra){Allocate_spare_col(TCcj);}
}
CRpr=max(CRi,0<=i<m);
CCpc=max(CCj,0<=i<n);
If(CRpr>Ccpc){Allocate_spare_row(TRpr);}
Else if (CRpr=Ccpc){Allocate_spare_column(TCpc);}
If(CRpr==Ccpc){
If(ra>=ca){Allocate_spare_row(TRpr);}
Else{Allocate_spare_column(TCpc);}
}
}
}

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I need the VHDL coding for the above redundancy analysis algorithm

 

[TrickyDicky]

what was the VHDL you posted in the other thread then?