Recursive VHDL and 3rd-party tool

[Binome]

Hi,
I've got a recursive module in VHDL (say an (2^n)-bit module that is instantiating two (2^(n-1))-bit modules and so on until the size is 2) and Xilinx ISE won't synthesize it but Altera Quartus II will. I'm not sure the recursive mode is the problem as someone in the Xilinx forum tells me he's sure ISE can handle it. So maybe it's another part.
Anyway, what other software can synthesize my design for a Xilinx target?
Thanks.

 

[barry]

Without any code, your question is impossible to answer.

 

[rberek]

Synplify and Synplify Pro can synthesize for Xilinx.

r.b.

 

[Binome]

I can't post my code because of industrial secrecy.
I tried synplify pro but it is not better...

 

[TrickyDicky]

Without code, there is little we can do.
How many modules are we talking about? whats the value of N? What errors is ISE giving? Does Quartus generate the expected logic?

If it wont work in ISE or Synplify pro, then you will have to change your coding style if you have to target a Xilinx device.

 

[permute]

I can't post my code because of industrial secrecy.
I tried synplify pro but it is not better...

Can you post an example of a recursive design that does nothing? eg, the module has N bits of input, passes half to each submodule until N = 1, then passes the input directly back (or performs a trivial operation like "not"). The goal is to see the error and the coding style you've used.