Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Receiver Design with less variations at different corners

Status
Not open for further replies.

kranthi_m

Newbie level 4
Joined
Feb 20, 2009
Messages
7
Helped
13
Reputation
26
Reaction score
13
Trophy points
1,283
Activity points
1,332
I want to design a receiver for an I/O which can receive a sequence of bits from the Transmission Line and convert them to digital logic.
One input to the receiver is a constant reference voltage and the other input is the data. The design should achieve less variations in output duty cycle at Typical, Fast and Slow corners.
Can anyone suggest an architecture.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top