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reading a binary file into a tesbench (vhdl)

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chat

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hello !

i want to read my binary file 0110,0001,0011--- in a test bench ? ny help ?
 

TrickyDicky

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is it really a binary file? or is it just a text file with 1s and 0s in the text?
 

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its a text file..

---------- Post added at 11:43 ---------- Previous post was at 11:42 ----------

it is a text file stored in notepad

---------- Post added at 11:45 ---------- Previous post was at 11:43 ----------

the main program is ..
Code:
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use std.textio.all;

entity s_ram is
port(

rama_clk : in std_logic;
rama_we : in std_logic;
rama_addr : in std_logic_vector(5 downto 0);
rama_din : in std_logic_vector(3 downto 0);
rama_dout : out std_logic_vector(3 downto 0));
end entity s_ram;

architecture syn of s_ram is

type RamType is array(0 to 2) of bit_vector(3 downto 0);
impure function InitRamFromFile (RamFileName : in string) return RamType is

File RamFile : text open READ_MODE is RamFileName;
variable RamFileLine : line;
variable RAM : RamType;
begin
for I in RamType'range loop
readline (RamFile, RamFileLine);
read (RamFileLine, RAM(I));
end loop;
return RAM;
end function;

signal RAM : RamType := InitRamFromFile("c:\ram_init.txt");

begin


process (rama_clk)
begin
if rama_clk'event and rama_clk = '0' then
if rama_we = '1' then
RAM(conv_integer(rama_addr)) <= to_bitvector(rama_din);
end if;
rama_dout <= to_stdlogicvector(RAM(conv_integer(rama_addr)));
end if;
end process;
end syn;
 

chat

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now i want to take the same text file from the test bench and do the same..
 

TrickyDicky

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then reuse the code you've already got - it does what you want.
 

chat

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the main code is perfect .. i want the same thing to be done on test bench ..

---------- Post added at 14:37 ---------- Previous post was at 14:36 ----------

the main code is perfect .. i want the same thing to be done on test bench ..
i.e extract the file contents and store in array format using test bench
 

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no , the file is being read from the main program, i wanted that the file should be rad from the test bench that i have created from the main program..
 

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can u let me know what will be the modification..?
 

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