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Sambhav_1

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Hi

What will be the output when ramp input is given and then voltage is settled?
 

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KlausST

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Hi,

looks like homework.

so what do your school books say?

or how do you expect a capacitor to behave (without resistor, or better say R=0 Ohms)

Klaus
 

Sambhav_1

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Hi,

looks like homework.

so what do your school books say?

or how do you expect a capacitor to behave (without resistor, or better say R=0 Ohms)

Klaus
when r=0, capacitor voltage will trace the input voltage
 

KlausST

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Hi,

O.K. true. This is nothing special, since an inductor, a resistor, an incandecent lamp ... will do the same.

What about the current?

Klaus
 

Sambhav_1

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Hi,

O.K. true. This is nothing special, since an inductor, a resistor, an incandecent lamp ... will do the same.

What about the current?

Klaus
so here the current will propotional to dv/dt i.e there will be constant current till t1 and then zero current
--- Updated ---

so here the current will propotional to dv/dt i.e there will be constant current till t1 and then zero current
is this correct?
 

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KlausST

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Hi,

Correct. Constant current.

What will happen when constant current is through a resistor?

..and the resistor voltage is the same as the ouput voltage?

Klaus
--- Updated ---

Hi,

I think you got it.

One detail to consider:
The voltage across the resistor also has influence on the voltage across the capacitor. V_cap = V_in - V_res.
So, as long as the voltage across the resistor changes the voltage rate across the capacitor also changes.

But the question was about steady state. Then the voltage across the resistor is considered constant and thus the voltage rise rate across the capacitor is the same as the input rise rate. So the resistor has no influence anymore.

Klaus
 
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