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RAM Help - code explanation needed

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vinothvon

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RAM Help

i got this code from net for RAM..

Code:
 module ram_sp_sr_sw (
 clk , // Clock Input
 address , // Address Input
 data , // Data bi-directional
 cs , // Chip Select
 we , // Write Enable/Read Enable
 oe // Output Enable
 );  
  
 parameter DATA_WIDTH = 8 ;
 parameter ADDR_WIDTH = 8 ;
 parameter RAM_DEPTH = 1 << ADDR_WIDTH;//shift '1' left by to the address width positions
  
 //--------------Input Ports-----------------------  
 input clk ;
 input [ADDR_WIDTH-1:0] address ;
 input cs ;
 input we ;
 input oe ;  
  
 //--------------Inout Ports-----------------------  
 inout [DATA_WIDTH-1:0] data ;
  
 //--------------Internal variables----------------  
 reg [DATA_WIDTH-1:0] data_out ;
 reg [DATA_WIDTH-1:0] mem [0:RAM_DEPTH-1];  <<<<----
  
 //--------------Code Starts Here------------------  
  
 // Tri-State Buffer control  
 // output : When we = 0, oe = 1, cs = 1
 assign data = (cs && oe && !we) ? data_out : 8'bz;   <<<<----(what is Z means?)
 // Memory Write Block  
 // Write Operation : When we = 1, cs = 1
 always @ (posedge clk)   <<<<----
 begin : MEM_WRITE
   if ( cs && we ) begin
     mem[address] = data;
   end
 end
  
 // Memory Read Block  
 // Read Operation : When we = 0, oe = 1, cs = 1
 always @ (posedge clk)   <<<<----
 begin : MEM_READ
   if (cs && !we && oe) begin
     data_out = mem[address];
   end
 end
  
endmodule // End of Module ram_sp_sr_sw

can anybody say what these line are?

( shown as <<---)

i'm new to this, so please say me briefly what is happening..
 

Re: RAM Help

reg [DATA_WIDTH-1:0] mem [0:RAM_DEPTH-1]; <<<<----

Variable reg & mem are defined which is 8 bit wide.

assign data = (cs && oe && !we) ? data_out : 8'bz; <<<<----(what is Z means?)

Z is high impedance state.

always @ (posedge clk) <<<<----

Execution of statement placed between begin & end will occur at every positive edge of the input clock.
 

Re: RAM Help

thanks for that help bro..


1.
Code:
Variable reg & mem are defined which is 8 bit wide.

is reg a variable?

2.is it possible to assign two things without comma?

Code:
reg [DATA_WIDTH-1:0] mem [0:RAM_DEPTH-1];

3. i need to explain the operation that is happening below this

Code:
always @ (posedge clk)

for both the statement(always)..

i am new here, i may ask some silly questions, hope you guys won't mind that..
 

RAM Help

1. Reg will be used to store values.
2. Not able to understand your question.

usage of the code quoted in 2 "indicates an 2-dimensional array".
3.Enter the block always during positive clock edge.
 

RAM Help

1. the line you asked is containing register array that will infered as memory array...
2. no it is not possible to assign two reg, wire or any data type with out comma. two things means what for you???
Here first brace contains length of register and second brace contains depth of register or memory...

3. always @ posedge clk means

what ever inside this block is executed when posedge of clock occur just like any flip flop,...

for example if you had written q <= d in side this it will assign value of d befor clock edge to q when clock edge occur
 

Re: RAM Help

awesome help guys, thanks for it..

for the third question, i knew something about always statement, but i need the working of lines after it, that is,

begin : MEM_WRITE
if ( cs && we ) begin
mem[address] = data;
end
end

begin : MEM_READ
if (cs && !we && oe) begin
data_out = mem[address];
end
end

if cs and we are enabled, then what oe does?

also what is length and depth of memory means?
 

Re: RAM Help

I'll start from your first post.

reg [DATA_WIDTH-1:0] mem [0:RAM_DEPTH-1];
This is declaring memory. ADDR_WIDTH is 8 so RAM_DEPTH is 256 so this declaration will declare a memory of 256 bytes.

Variable reg & mem are defined which is 8 bit wide.
This is incorrect.

assign data = (cs && oe && !we) ? data_out : 8'bz;
When cs and oe are enabled and we ins't then we are reading memory. data will hold the value read from the memory specified by address and we are making sure that we have reset this register before doing that.

always @ (posedge clk)
Other people are giving nice explanation for this. I think you are being confused by the labels of these blocks i.e. MEM_WRITE and MEM_READ, otherwise the block comments are also quote explanatory.
 

    vinothvon

    Points: 2
    Helpful Answer Positive Rating
RAM Help

thanks for your help guys..
 

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