questions about noise power calculation

[airboss]

Hi,

I have some questions about noise calculation.

1) we know if a transistor or a resistor is tied with a capacitor, the total noise power is kT/C. my question is, could the C be an intrinsic capacitor of a transistor?

2) the following question is for a on-going project. i really need some clues. the schematic is attached as follows. it is a sense amplifier. i want to see at which time point would the noise cause an error at the output. my advisor asked me to find the mathematical solution of input referred noise and then do the simulation.

here's my question. how should i do it? i think there're two possibilities.
a)at point A & B, they're acting like capacitors. A & B are close to the input fets as well. so we should know how much (noise power) A&B will have and then refer it to the input and see the effects.
b)we should see the noise power at OPl & OPr and then refer it to the input.
which one above is correct?


i really appreciate any feedback!

 

[baniliu]

Dear areboss,

Here let me try to give my idea about it.

1). kT/C will be the noise power integrated with the frequency range, for RC network, the noise produced by the resistor integrated to the high frequency detemined by 1/RC -3dB. But for a transistor, i don't think the kT/C is a proper description to the transistor noise power, it can be regards as the noise produced by the transistor integrate with its frequency range (the bandwidth is not only detemined by its intrinsic capacitance but often the external capacitance).

2.) It may be a comparator with latchly positive feedback with large gain, seems hard to get to a balance state. I think b) is reasonable, you also need to consider the load parasitic capacitance of the stage connected to OPI&OPR, that is the bandwidth of the sense amplifier.

baniliu