Questions about clock signals in I2C slave clock

[altair_06]

Hi friends,

I need a clarification on I2C scl clock.

When I2C device acts as slave will it need any internal refference clock or input scl clock alone is sufficient to sample the data ?

1.since I2C master has the capability of controlling the scl line (pull up the scl line)

2.onother case, slave is capable of pulling down scl line when it driving data Ack in that case it need a reference time period/clock so that time it can pull down the scl line for that perilod.

3. For above two cases when developing BFM's how do we take care of clock signals.

friends u can come up with what ever the your ideas

Thanks for your time

 

[btbass]

I2C slave clock

Follow this link for i2c information.

h**p://www.robot-electronics.co.uk/htm/using_the_i2c_bus.htm

 

[gck]

I2C slave clock

The SCL clock is very slow so preferably internal clock with higher frequency is used.

To detect START and STOP condition we need to have higher frequency sampling clock as both condition fall between positive edge.